1. The Field of the Invention
The present invention concerns a method and a device for the acquisition of synchronization bits in data transmission systems
It can be applied especially to the transmission of encoded data by radio or cable wherein the flow of binary data transmitted is cut up into framed blocks.
In these transmissions, the pieces of information are conveyed in sequences of pseudo-random bits, and the bits given by the reception demodulators can represent one or more multiplexed channels, the multiplexing of the channels being generally done bit by bit.
2. Description of the Prior Art
According to a known embodiment, described in the THOMSON-CSF Journal, volume 18, No. 1. March 1986, published by Gauthier Villars, the synchronization bits in a multiplexed frame of messages are searched for by recognizing, in the sequence of pseudo-random bits, those bits which have the properties of Fibonacci sequences. This search enables the demultiplexing and makes it possible to automatically recognize the direction (direct or reversed) of the received bits. The synchronization is found by making correlations on each of the synchronized channels of the multiplex and, to reduce the probability of a false alarm, namely the probability of wrongly recognizing a bit, correlations are made on a defined fixed number of samples. However, this search cannot be done efficiently unless the receiver has prior knowledge of the format of the information emitted and, especially, unless it knows the multiplexed channels subjected to this synchronization. Furthermore, the method does not enable the total elimination of errors that occur on the synchronization bits, thus making it difficult to use them as time markers, for example for cipher equipment.
Another known method can be used, however, to partially cope with this latter drawback. According to this method, the sequence of bits of the pseudo-random sequence of bits received is compared with a pseudo-random sequence of the same generation. However, for a frame with a length L, the search for the synchronization can last the time taken for L elementary tests performed on N frames, N being defined by the depth of the register of transmitted pseudo-random sequences wherein the synchronization bits are generated. Furthermore, these tests are, all the same, conducted even there are no errors. Each test proper takes place on N bits which follow the first N bits already entered in a register with a length 2N. Each received bit is compared with the sum that was used to generate it in the transmission enciphering device. At the end of the test, the frame is rejected if the number of differences obtained is greater than a defined threshold. A majority vote is also taken among the following bits reaching the register and the sums coming from the bits of the register to eliminate the simple errors, thus making it possible, in the event of error, to introduce a number of voted bits into the register by internal looping. The synchronization is achieved in these circumstances if there has been less than a maximum number of differences between the received bits and the bits generated by the internal looping of the register.
However, in addition to the fact that, with this method, the acquisition of the synchronization takes a relatively long time, possibly greater than L times the length N of the register which gives the synchronization pseudo-random bits at transmission, a blockage of the reception register is got or again, a systematic introduction of erroneous bits into this register, especially when the tests concern regularly erroneous bits.
The purpose of the invention is to remove the above-mentioned drawbacks.